Intel is hiring candidates for the Physical Design Layout Engineer ICE role in Bangalore, Karnataka. This opportunity is suitable for candidates with a Bachelor’s degree in Electronics/Electrical Engineering with 0–1 years of experience or a Master’s degree in Electronics/Electrical Engineering with no prior professional experience.

The selected candidates will work on physical chip design, layout development, verification, floor planning, and semiconductor design methodologies. Candidates with knowledge of layout design, verification, ICC2 tools, and TCL scripting can apply for this opportunity.
Intel Off Campus 2026
| Details | Information |
|---|---|
| Company | Intel |
| Job Role | Physical Design Layout Engineer ICE |
| Job ID | JR0286585 |
| Qualification | B.E./B.Tech or M.E./M.Tech |
| Eligible Branches | Electronics / Electrical Engineering or related fields |
| Experience | 0–1 Years / Freshers |
| Skills Required | Physical Design, Layout Design, Verification, ICC2 |
| Preferred Skill | TCL Scripting |
| Job Type | Full-Time |
| Work Model | Hybrid |
| Location | Bangalore, Karnataka |
| Shift | Shift 1 – India |
| Salary | Not Disclosed |
| Job Type | Intel Contract Employee |
Job Description
Intel is looking for a Physical Design Engineer to contribute to the development and optimization of chip designs at the physical level. The role involves working on cell and block-level semi-custom layouts, FUB-level floor plans, abstract view generation, and schematic-to-layout verification.
The selected candidates will work with semiconductor engineering teams to develop reliable and optimized chip designs. The role also provides an opportunity to work with physical design methodologies, verification processes, and advanced semiconductor technologies.
Roles and Responsibilities
- Develop and optimize physical chip designs.
- Work on cell and block-level semi-custom layouts.
- Perform FUB-level floor planning and full-chip assembly.
- Generate abstract views and perform schematic-to-layout verification.
- Conduct reliability verification and debug design issues.
- Work with parasitic extraction and custom polygon editing.
- Use auto-place and route algorithms for chip design.
- Collaborate with engineering teams to solve complex design challenges.
- Support methodology, flow development, and verification activities.
- Contribute to improving physical design processes and methodologies.
Qualifications & Skills
- Bachelor’s degree in Electronics, Electrical Engineering, or a related field with 0–1 years of experience.
- Candidates with internships, academic projects, coursework, or hands-on training in physical design may be eligible.
- Master’s degree in Electronics, Electrical Engineering, or a related field with no prior professional experience is also eligible.
- Basic understanding of layout design and verification processes.
- Familiarity with ICC2 tools.
- Knowledge of TCL scripting is an advantage.
- Strong problem-solving and troubleshooting skills.
- Good communication and collaboration skills.
- Interest in semiconductor technologies and physical design methodologies.
How To Apply For Intel Careers
- Click on the Apply Here button below.
- You will be redirected to the official Intel Careers website.
- Search for Physical Design Layout Engineer ICE or Job ID JR0286585.
- Review the eligibility requirements.
- Click on Apply and sign in/register.
- Fill in your details and upload your updated resume.
- Review your application carefully.
- Submit the application.
Intel Apply Link: Click Here
About Intel
Intel is a global technology company known for developing processors, semiconductor technologies, and computing solutions. Its engineering teams work across areas including chip design, artificial intelligence, networking, hardware, software, and semiconductor manufacturing.
This opportunity offers fresh graduates and early-career engineers a chance to work on physical design and contribute to the development of advanced chip technologies.



